Bias circuit for control input of power transistor
US6331799A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 2000 |
| Grant date | Dec 18, 2001 |
| Priority date | — |
| Expiry date | Feb 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/372
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
In a Q0 bias circuit 20B, a current source transistor Q4 is serially connected to the emitter of an emitter follower transistor Q1, the base potential of the transistor Q4 is adjusted by a current source control circuit 50 so that the emitter current IE1 of the transistor Q1 is kept approximately constant even though the base bias current IB0 of a power transistor Q0 changes. In stead of an RF signal cut-off coil L1, resistors may be connected between the emitter of the transistor Q1 and the base of the power transistor Q0, and between the collector of the transistor Q4 and the base of the power transistor Q0. Connecting of the current source may be between the base of the transistor Q1 and the grounded line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.