Method for manufacturing semiconductor device and semiconductor device
US6335265B1 · kind B1 · utility
5Cited by
8References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 23, 1999 |
| Grant date | Jan 1, 2002 |
| Priority date | — |
| Expiry date | Nov 23, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a plated heat sink layer on the back surface, preventing a short-circuit between a bonding wire and a first metal layer. A method of making a semiconductor device includes forming a catalyst layer on a bottom of a first separation groove in the front surface of a semiconductor substrate, forming a first metal layer selectively in the first separation groove by electroless plating, using the catalyst layer as a catalyst.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.