Method to test devices on high performance ULSI wafers
US6337218B1 · kind B1 · utility
4Cited by
32References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 1999 |
| Grant date | Jan 8, 2002 |
| Priority date | — |
| Expiry date | May 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/312
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus for testing structures in semiconductor wafers. The apparatus includes at least one test probe. At least one tool measures and controls deceleration of the at least one test probe as it approaches a surface of a structure in the semiconductor wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.