Method of dividing a wafer
US6337258B1 · kind B1 · utility
29Cited by
28References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2000 |
| Grant date | Jan 8, 2002 |
| Priority date | — |
| Expiry date | Jul 20, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01322
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Grooves are formed in an element formation surface of a wafer along dicing lines or chip dividing lines. The grooves are deeper than a thickness of a finished chip. A holding member is attached on the element formation surface of the wafer. A bottom surface of the wafer is lapped and polished to the thickness of the finished chip, thereby dividing the wafer into chips. The chips are transferred while being held by porous adsorption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.