Silicide agglomeration fuse device with notches to enhance programmability
US6337507B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1996 |
| Grant date | Jan 8, 2002 |
| Priority date | — |
| Expiry date | Dec 18, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fusible link device disposed on a semiconductor substrate for providing discretionary changes in resistance. The fusible link device of the invention includes a polysilicon layer having a first resistance. A silicide layer formed on the polysilicon layer has a second, lower resistance and includes a fuse region having a first notched region narrower than the center of the fuse region, a first contact region electrically coupled to one end of the fuse region and a second contact region electrically coupled to an opposite end of the fuse region. The silicide layer agglomerates to form an electrical discontinuity in the fuse region (usually in the notched region) in response to a current greater than or equal to a predetermined programming current flowing between the contact regions, such that the resistance of the fusible link device can be selectively increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.