Dynamic semiconductor memory device with reduced current consumption in sensing operation
US6337824B1 · kind B1 · utility
63Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 7, 1999 |
| Grant date | Jan 8, 2002 |
| Priority date | — |
| Expiry date | Dec 7, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4091
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A decoupling capacitor is coupled to a sense power supply line with respect to a sense amplifier circuit group, and the sense power supply line is selectively coupled with a power supply node in response to an operation mode of a sense amplifier. In a sensing operation, the potential of a bit line is determined by redistribution of charges between the decoupling capacitor and a load capacitor of the bit line. Refresh characteristics is improved without increasing a sense current and showing down the sensing operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.