System and method for sequencing packets for multiprocessor parallelization in a computer network system
US6338078B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 1998 |
| Grant date | Jan 8, 2002 |
| Priority date | — |
| Expiry date | Dec 17, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/32
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Network input processing is distributed to multiple CPUs on multiprocessor systems to improve network throughput and take advantage of MP scalability. Packets received on the network are distributed to N high priority threads, wherein N is the number of CPUs on the system. N queues are provided to which the incoming packets are distributed. When one of the queues is started, one of the threads is scheduled to process packets on this queue at any one of the CPUs that is availableat the time. When all of the packets on the queue are processed, the thread becomes dormant. Packets are distributed to one of the N queues by using a hashing function based on the source MAC address, source IP address, or the packet's source and destination TCP port number, or all or a combination of the foregoing. The hashing mechanism ensures that the sequence of packets within a given communication session will be preserved. Distribution is effected by the device drivers of the system. Parallelism is thereby increased on network I/O processing, eliminating CPU bottleneck for high speed network I/Os, thereby improving network performance
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.