Herman Dietrich Dierks, Jr.
21Patents
4h-index
38Co-inventors
59Inventor score
Filing activity: Dec 17, 1998 → Nov 13, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6631422B1 | Network adapter utilizing a hashing function for distributing packets to multiple processors for parallel processing | Electricity | 82 | Expired |
| US6338078B1 | System and method for sequencing packets for multiprocessor parallelization in a computer network system | Electricity | 74 | Expired |
| US7174386B2 | System and method for improved performance using tunable TCP/IP acknowledgement | Electricity | 15 | Expired |
| US7715428B2 | Multicore communication processing | Electricity | 9 | Active |
| US7818433B2 | System and method for minimizing retry delays in high traffic computer networks | Electricity | 4 | Active |
| US7065581B2 | Method and apparatus for an improved bulk read socket call | Electricity | 4 | Expired |
| US6430659B1 | Method and means for increasing performance of multiprocessor computer systems by reducing accesses to global memory locations through the use of quanta | Emerging Cross-Sectional Technologies | 4 | Expired |
| US7831980B2 | Scheduling threads in a multi-processor computer | Physics | 3 | Active |
| US7454456B2 | Apparatus and method of improving network performance using virtual interfaces | Electricity | 2 | Expired |
| US7937508B2 | Method and apparatus for transferring data from a memory subsystem to a network adapter by extending data lengths to improve the memory subsystem and PCI bus efficiency | Physics | 2 | Active |
| US7469296B2 | Method and apparatus for an improved bulk read socket call | Electricity | 1 | Active |
| US7512072B2 | TCP/IP method FPR determining the expected size of conjestion windows | Electricity | 1 | Active |
| US7817560B2 | Acknowledging packet receipt based on expected size of sender's congestion window | Electricity | 1 | Active |
| US7356664B2 | Method and apparatus for transferring data from a memory subsystem to a network adapter for improving the memory subsystem and PCI bus efficiency | Physics | 1 | Expired |
| US9276879B2 | Memory transfer optimization of network adapter data placement when performing header-data split operations | Electricity | 1 | Active |
| US8806153B2 | Partial line cache write injector for direct memory access write | Physics | 0 | Active |
| US7376763B2 | Method for transferring data from a memory subsystem to a network adapter by extending data lengths to improve the memory subsystem and PCI bus efficiency | Physics | 0 | Expired |
| US9270620B2 | Memory transfer optimization of network adapter data placement when performing header-data split operations | Electricity | 0 | Active |
| US8595472B2 | Ganged hardware counters for coordinated rollover and reset operations | Physics | 0 | Active |
| US7526706B2 | Method and apparatus for preventing network outages | Electricity | 0 | Active |
| US7970925B2 | Method and apparatus for an improved bulk read socket call | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.