Prefabricated semiconductor chip carrier
US6339191B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 1994 |
| Grant date | Jan 15, 2002 |
| Priority date | — |
| Expiry date | Mar 11, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49153
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads. A method of manufacturing a semiconductor die carrier includes the steps of individually manufacturing a plurality of electrically conductive leads without use of a lead frame; extending a plurality of the electrically conductive leads from at least one of a plurality of electrically insulative side walls; positioning a semiconductor die such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and electrically connecting the semiconductor die to corresponding ones of the electrically conductive leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.