Automatic recovery from clock signal loss
US6339833B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 10, 1999 |
| Grant date | Jan 15, 2002 |
| Priority date | — |
| Expiry date | Feb 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus and method are disclosed for initiating automatic recovery from a signal loss. A frequency division circuit receives a system clock signal, and generates an output signal having a lower frequency than the clock signal. An input detection circuit receives an asynchronous input signal from an external source and outputs a third output signal that indicates whether or not the asynchronous input signal is present or absent within a prescribed detection interval. A recovery circuit receives the system clock signal and the third output signal, and outputs a recovery signal that indicates a loss of the asynchronous input signal over a predetermined length of time. The recovery signal is used as a trigger to initiate a recovery process by the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.