Navigation using 3-D detectable pattern
US6348364B1 · kind B1 · utility
3Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 26, 1999 |
| Grant date | Feb 19, 2002 |
| Priority date | — |
| Expiry date | Aug 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
According to one aspect of the disclosure, the present invention provides methods and arrangements for milling the substrate of a semiconductor device to expose a selected region in the substrate, wherein the semiconductor device has a grid formed in the device to provide lateral and depth position indication during an etch/milling process. In an example implementation, the grid is three dimensional and is used during device analysis for navigation while removing substrate to access a selected circuit area via the backside of flip-chip device. As substrate is removed, the tools are aligned as indicated by the grid.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.