High-speed output driver with an impedance adjustment scheme
US6351172B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 29, 2000 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Feb 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00384
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dynamic impedance adjustment circuit that reduces overshoot and undershoot noise while achieving fast slew rates. The dynamic impedance adjustment circuit has an output driver for selectively driving or drawing current providing source or sink current. The dynamic impedance adjustment circuit also has an a variable impedance output driver for selectively providing a dynamic current (source or sink) for a predetermined time after transitions from a logic low level to a logic high level or from a logic high level to a low logic level in the input signal. An impedance adjustment control circuit is coupled to the variable impedance output driver for automatically detecting the transitions in the input signal and for changing the impedance of the variable impedance output driver based on the input signal, enable signal, and the output node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.