Method and circuit for high voltage programming of antifuses, and memory device and computer system using same
US6351425B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 2000 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Dec 7, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for programming and reading an antifuse includes a bias circuit for applying a positive voltage to a first terminal of the antifuse, and a programming circuit for coupling a second terminal of the antifuse to an external terminal to allow a relatively large negative programming voltage to be applied to the antifuse. Significantly, the programming voltage is coupled to the antifuse over a conductive path that is isolated from any semiconductor device in the integrated circuit. As a result, the programming voltage cannot overstress any semiconductor devices, thereby allowing the magnitude of the programming voltage to be significantly larger that permitted by conventional antifuse circuits. After the antifuse has been programmed, the antifuse circuit is prepared for use by connecting a jumper from the conductive programming path to ground, thereby grounding the second terminal of the antifuse. The conductive state of the antifuse is read using the bias circuit to apply a positive voltage to the first terminal of the antifuse, and coupling the first terminal to a latching circuit, which latches a signal to an output terminal indicative of the logic level at the first termina…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.