Mixer with high order intermodulation suppression and robust conversion gain
US6351632B1 · kind B1 · utility
16Cited by
12References
18Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Oct 13, 1998 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Oct 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D7/125
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A circuit is disclosed for a receiver front-end for a Personal Handy Phone. The circuit consists of a high frequency mixer consisting of a cascade downmixer, tapped at the center, and followed by a common source intermediate (IF) amplifier. The combination of downmixer and IF amplifier provides a high third order intermodulation suppression and a robust conversion gain. The proposed circuit can also be applied to other FET technologies and other uses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.