Semiconductor wafer and method for fabrication thereof
US6352927B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 22, 1999 |
| Grant date | Mar 5, 2002 |
| Priority date | — |
| Expiry date | Nov 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02008
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is disclosed a semiconductor wafer obtained, at least, by removing a mechanical damage layer by etching both surfaces of the wafer, flattening one of the surfaces by a surface-grinding means, polishing both of the surfaces, and then subjecting a front surface of the wafer to a finishing mirror-polishing when defining the surface subjected to surface-grinding as a back surface of the wafer, and a method for fabricating it. There can be provided a method for fabricating a semiconductor wafer wherein grinding striations which remain on a semiconductor wafer even when double side polishing and finishing mirror-polishing are conducted after a conventional step of surface-grinding of the front surface or the both surfaces, are eliminated to improve quality of the front surface of the wafer, and the back surface having a quality suitable for the device process can be obtained, and a semiconductor wafer obtained thereby.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.