Layer build-up method for manufacturing multi-layer board
US6353997B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 7, 1999 |
| Grant date | Mar 12, 2002 |
| Priority date | — |
| Expiry date | Oct 7, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A layer build-up process for forming a multi-layer board. A conductive substrate has a plurality of bumps formed thereon. The space between the bumps is filled with a dielectric material. The conductive substrate and a core substrate having an insulation layer and a first wiring layer on each side of the insulation layer are pressed together such that the bumps are electrically connected to one of the first wiring layer via a joining material. The conductive substrate is next patterned to form a second wiring layer such that the second wiring layer is electrically coupled to one of the first wiring layer via the bumps. The second wiring layer, the bumps and the dielectric material together constitute a composite layer unit. To obtain a multi-layer board, a multiple of the composite layer units can be formed over each side of a substrate core by repeating the above process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.