Silicon carbide LMOSFET with gate reach-through protection
US6355944B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 21, 1999 |
| Grant date | Mar 12, 2002 |
| Priority date | — |
| Expiry date | Dec 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/256
Abstract
A silicon carbide LMOSFET having a self-aligned gate with gate reach-through protection and method for making same. The LMOSFET includes a first layer of SiC semiconductor material having a p-type conductivity and a second layer of SiC semiconductor material having an n-type conductivity formed on the first layer. Source and drain regions having n-type conductivities are formed in the second SiC semiconductor layer. An etched trench extends through the second SiC semiconductor layer and partially into the first SiC semiconductor layer. The trench is coated with a layer of an electrically insulating oxide material and partially filled with a layer of metallic material thereby forming a gate structure. A channel region is defined in the first layer beneath the gate structure. The gate structure is rounded or buried to provide a current path in the channel region which avoids sharp corners.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.