Cross point memory array including shared devices for blocking sneak path currents
US6356477B1 · kind B1 · utility
75Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 29, 2001 |
| Grant date | Mar 12, 2002 |
| Priority date | — |
| Expiry date | Jan 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information storage device includes a resistive cross point array of memory elements and a plurality of devices (e.g., diodes, transistors) for blocking sneak path currents in the array during read operations. Each blocking device is connected to and shared by a group of memory elements in the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.