Method and system for bypassing cache levels when casting out from an upper level cache
US6356980B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 1999 |
| Grant date | Mar 12, 2002 |
| Priority date | — |
| Expiry date | Nov 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0888
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for bypassing cache levels when storing data castout from an upper level cache provides a memory hierarchy that can selectively skip one more more intermediate levels when writing castout entries from a higher level cache based on a number of detected conditions. The intermediate levels may be bypassed when an intermediate cache level is busy, has an entry with an address conflict with the castout value, or may skip levels based on program control. The control providing the skipping selection may be driven by a detector that analyzes load/store operations of a processor in order to produce efficient operation under changing memory use conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.