Wafer-pair having deposited layer sealed chambers
US6359333B1 · kind B1 · utility
64Cited by
10References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1998 |
| Grant date | Mar 19, 2002 |
| Priority date | — |
| Expiry date | Mar 31, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01J5/0875
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A wafer-pair having at least one recess in one wafer and the recess formed into a chamber with the attaching of the other wafer which has a port plugged with a deposited layer on its external surface. The deposition of the layer may be performed in a very low pressure environment, thus assuring the same kind of environment in the sealed chamber. The chamber may enclose at least one device such as a thermoelectric sensor, bolometer, emitter or other kind of device. The wafer-pair typically will have numerous chambers, and may be divided into chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.