Abrasion method of semiconductor device
US6361406B1 · kind B1 · utility
2Cited by
6References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 13, 2000 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Apr 13, 2020 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B49/02
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
In an abrasion method of a semiconductor device, in which concavity and convexity of an oxidized film surface on a wafer 13 are abraded using an abrasive pad 11, a region to be simulated in a layout data of a wiring process of the semiconductor device is divided into a plurality of small regions (i,j), and approximate average height H(i,j) of the abrasive pad 11 from a concave pattern 14 in the small regions (i,j) is calculated based on a sum total B of areas of tip surfaces of convex patterns, average height h(i,j) of the convex patterns 12, and a sum total C of an area of a surrounding region P around each convex pattern 12.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.