Blocking of boron diffusion through the emitter-emitter poly interface in PNP HBTs through use of a SiC layer at the top of the emitter epi layer
US6362065B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2001 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Feb 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method of forming a bipolar transistor or a heterojunction bipolar transistor. The method comprises forming a collector region associated with a semiconductor substrate, and forming a base region base region over at least a portion of the collector region. The method further comprises forming a diffusion blocking layer over the base region, and forming an emitter polysilicon region over the diffusion blocking layer. The diffusion blocking layer reduces an amount of diffusion from the emitter polysilicon region into the base region, thereby allowing improved process control and emitter/base doping profile, leading to improved transistor performance. In addition, the present invention relates to a heterojunction bipolar transistor, and comprises a collector region, and a graded profile SiGe base layer overlying the collector region. The transistor further comprises a diffusion blocking layer overlying the graded profile SiGe base layer, and an emitter layer overlying the diffusion blocking layer. The diffusion blocking layer is operable to retard a diffusion of dopants therethrough from the emitter layer to the graded profile SiGe base layer, thereb…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.