Process for manufacturing a SOI wafer with buried oxide regions without cusps
US6362070B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2000 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Apr 26, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76248
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing a SOI wafer with buried oxide regions without cusps that includes forming, in a wafer of monocrystalline semiconductor material, trenches extending between, and delimiting laterally, protruding regions; forming masking regions, implanted with nitrogen ions, the masking regions surrounding completely the tips of the protruding regions; and forming retarding regions on the bottom of the trenches, wherein nitrogen is implanted at a lower dose than the masking regions. A thermal oxidation is then carried out and starts at the bottom portion of the protruding regions and then proceeds downwards; thereby, a continuous region of buried oxide is formed and is overlaid by non-oxidized regions corresponding to the tips of the protruding regions and forming nucleus regions for a subsequent epitaxial growth. The masking regions and the retarding regions are formed through two successive implants, including an angle implant, wherein the protruding regions shield the bottom portions of the adjacent protruding regions, as well as the bottom of the trenches, and a vertical implant is made perpendicularly to the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.