Contoured nonvolatile memory cell
US6362504B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 22, 1995 |
| Grant date | Mar 26, 2002 |
| Priority date | — |
| Expiry date | Aug 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/681
Abstract
A nonvolatile memory cell of the type having a single lateral transistor includes source and drain regions separated by a channel region. A floating gate is provided over at least the channel region and is separated therefrom by a gate oxide, with a control gate over the floating gate and insulated therefrom. By having the floating gate extend over substantially its entire length at a substantially constant distance from the surface of the device, and providing the floating gate and the surface with similarly-contoured corners adjacent ends of the source and drain regions alongside the channel region, the nonvolatile memory cell can be programmed and erased using lower voltages than those required by priorart devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.