Method of planarization using selecting curing of SOG layer
US6368906B1 · kind B1 · utility
8Cited by
5References
13Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 9, 1998 |
| Grant date | Apr 9, 2002 |
| Priority date | — |
| Expiry date | Dec 9, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/31
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for planarizing an interlayer dielectric layer formed on a semiconductor substrate having a step, using wet etch, by depositing first and second layers on the semiconductor substrate and selectively curing the second layer in the lower area using electron beams (E-beams). The second layer, e.g., an SOG layer formed of HSQ, has a lower etch rate during the wet etch in the cured area, to thereby easily planarize the substrate of the interlayer dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.