Semiconductor method of manufacture
US6368943B1 · kind B1 · utility
5Cited by
4References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2000 |
| Grant date | Apr 9, 2002 |
| Priority date | — |
| Expiry date | May 12, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/78
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
On the scribe line area formed between a plurality of semiconductor clip areas on a semiconductor wafer, there is provided a chipping prevention portion constituted by a double groove consisting of the first and second grooves. Thus, the entry of chipping into the semiconductor chip area is prevented when dicing the semiconductor wafer along the scribe line area provided between each of the semiconductor chip areas. In this respect, an insulating film may be formed on the surface of the semiconductor wafer on the side of an element forming area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.