Method of polishing semiconductor structures using a two-step chemical mechanical planarization with slurry particles having different particle bulk densities
US6368955B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 1999 |
| Grant date | Apr 9, 2002 |
| Priority date | — |
| Expiry date | Nov 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention is a method for removing a portion of a liner film and a metallization layer superimposed over the liner film to expose an underlying dielectric layer on a semiconductor wafer. Specifically, at least a portion of the metallization layer is removed by chemical mechanical polishing the metallization layer using a first polishing slurry having a plurality of first abrasive particles and at least a portion of the liner film is removed by chemical mechanical polishing the liner film using a second polishing slurry having a plurality of second abrasive particles. The first abrasive particles and the second abrasive particles used in the polishing steps have different bulk densities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.