Circuit configuration for a frequency divider
US6369623B1 · kind B1 · utility
10Cited by
3References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 30, 2000 |
| Grant date | Apr 9, 2002 |
| Priority date | — |
| Expiry date | Jun 30, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/193
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit configuration of a frequency divider includes a prescaler with at least two different division ratios and at least two further different division ratios. A main counter connected to an output of the prescaler has an adjustable division ratio. A first lower-level swallow counter has an adjustable division ratio and can change the division ratio of the prescaler. At least one second lower-level swallow counter has an adjustable division ratio, is provided at the output of the main counter and can change the division ratio of the prescaler between the two further division ratios.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.