Self-aligned MOSFET with electrically active mask
US6372592B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1996 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Dec 18, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6743
Abstract
A method for making a self-aligned FET with an electrically active mask comprises the steps of forming a semiconductor layer on an insulating substrate, forming an electrically nonconductive oxide layer on the semiconductor layer, forming an electrically conductive metal layer on the oxide layer, patterning the metal layer and the oxide layer to form an electrically active gate on semiconductor layer, introducing dopants into the semiconductor layer to form a source region and a drain region masked by the metal gate, and illuminating the source and the drain regions with a pulsed excimer laser having a wavelength from about 150 nm to 350 nm to anneal the source region and the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.