Patent · US Expired

Etch stops and alignment marks for bonded wafers

US6372600B1 · kind B1 · utility

25Cited by
13References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 30, 1999
Grant dateApr 16, 2002
Priority date—
Expiry dateAug 30, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

There is described a method of making a bonded wafer by diffusing regions of a first wafer proximate a first major surface. Trenches are etched a predetermined distance into the first wafer from the first major surface toward a second major surface. The first major surface and trenches are coated with oxide. The first major surface of the first wafer is bonded to a second wafer to form a bonded wafer. The second major surface of the bonded wafer which is also the second major surface of the first wafer is ablated until oxide in the trenches is detected. The bonded wafer is cut into chips which are packaged as integrated circuits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.