Integrated circuit having wirebond pads suitable for probing
US6373143B1 · kind B1 · utility
15Cited by
29References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 24, 1998 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Sep 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01079
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit device structure having probe pad extensions in electrical communication with the wire bond pads and a method for performing failure analysis thereon. The invention provides an improved probing system for wire bond packages such that neither the wire nor the wire bond from the pads on the chip surface need be removed during testing procedures. Included in the integrated circuit device is a plurality of conductive pads having a first area for receiving a wire bond and a second area for receiving a probe, wherein the second area abuts, and is an electrical communication with the first area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.