Single supply voltage nonvolatile memory device with row decoding
US6373780B1 · kind B1 · utility
9Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2000 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Jul 28, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The memory device comprises a memory array having an organization of the type comprising global word lines and local word lines, a global row decoder addressing the global word lines, a local row decoder addressing the local word lines, a global power supply stage supplying the global row decoder, and a local power supply stage supplying the local row decoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.