Method and system for flexible control of BIST registers based upon on-chip events
US6374370B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 1998 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Oct 30, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and structure facilitates the debugging and test coverage capabilities of a microprocessor. A microprocessor having memory arrays, a debug block, and one or more built-in-self-test (BIST) engines is disclosed. The debug block is capable of driving control information out onto a state machine output bus in response to an event and the control information can be selectively used to control signature analysis or recording elements of the microprcessor, such as multiple-input-shift-registers and first-in-first-out devices, that facilitate in the monitoring and debugging of the microprocessor. The signature and recording elements may or may not be contained within the one or more BIST engines and may or may not be used in conjunction with the memory arrays or BIST engine(s) of the microprocessor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.