Methods and structures for protecting reticles from ESD failure
US6376131B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2000 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Apr 4, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/40
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A reticle that is modified to prevent bridging of the masking material (e.g., chrome) between portions of the lithographic mask pattern during an integrated circuit fabrication process. According to a first aspect, the modification involves electrically connecting the various portions of the lithographic mask pattern that balance charges generated in the portions during fabrication processes. In one embodiment, sub-resolution wires that extend between the lithographic mask pattern portions facilitate electrical conduction between the mask pattern portions, thereby equalizing dissimilar charges. In another embodiment, a transparent conductive film is formed over the lithographic mask pattern to facilitate conduction. In accordance with a second aspect, the modification involves separating the various portions of the lithographic mask pattern into relatively small segments by providing sub-resolution gaps between the various portions, thereby minimizing the amount of charge that is generated on each portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.