High voltage breakdown isolation semiconductor device and manufacturing process for making the device
US6376891B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 1996 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Jul 19, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a high breakdown voltage semiconductor device, a buried diffusion region is formed on a semiconductor substrate and an epitaxial layer is formed on the buried diffusion region and the substrate. The epitaxial layer includes a low breakdown voltage element region adjoined by a high breakdown voltage isolation region. A method for forming the high breakdown voltage isolation region complies with a Resurf condition by adjusting a thickness and an impurity concentration of the epitaxial layer. Thus, a high breakdown voltage semiconductor device and a manufacturing process therefor is provided, which includes a low breakdown voltage element region and a high breakdown voltage element region, and a high breakdown isolation region separates a high breakdown voltage region without impairing the characteristics of an element formed on the low breakdown voltage element region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.