Tape carrier for BGA and semiconductor device using the same
US6376916B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2000 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Jan 20, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip is mounted on a tape carrier by interposing an elastmer layer therebetween, so that thermal stress caused by a difference of thermal expansion coefficients of the semiconductor chip and the tape carrier is relieved. The tape carrier is structured by an insulating film and a plurality of leads formed on the insulating film. The insulating film has an opening for bonding the plurality of leads to the electrodes of the semiconductor chip, and the elastmer layer comprises first and second elastmer layers provided on the opposite sides of the opening to be separated around at least one end of the opening. The opening may be divided into a plurality of openings, in each of which a corresponding one or some of connected portions of the plurality of leads and the electrodes of the semiconductor chip are positioned, and sealing resins are filled in the plurality of openings to seal the connected portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.