Circuitry to support a power/area efficient method for high-frequency pre-emphasis for chip to chip signaling
US6377076B1 · kind B1 · utility
49Cited by
11References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 15, 2000 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Feb 15, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0286
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit which allows for a more efficient pre-emphasis of a high frequency inter-chip signal. The circuit uses a single predriver stage to equalize a signal when a transition in value of a digital signal is detected. The circuit equalizes the signal with decreased power and area requirements for greater efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.