Clock synchronous type semiconductor memory device that can switch word configuration
US6377512B1 · kind B1 · utility
25Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2000 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Sep 23, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data buses are arranged in a one-to-one correspondence to pads. These data buses are arranged in common to a plurality of memory arrays. A read data driver is rendered active selectively according to a word configuration to switch equivalently the connection between a memory array and a data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.