System to implement a cross-bar switch of a broadband processor
US6378060B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2000 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Feb 11, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a cross-bar circuit that implements a switch of a broadband processor. In an exemplary embodiment, the present invention provides a cross-bar circuit that, in response to partially-decoded instruction information and in response to datapath information, (1) allows any bit from a 2n-bit (e.g. 256-bit) input source word to be switched into any bit position of a 2m-bit (e.g. 128-bit) output destination word and (2) provides the ability to set-to-zero any bit in said 2m-bit output destination word. The cross-bar circuit includes: (1) a switch circuit which includes 2m 2n:1 multiplexor circuits, where each of the 2n:1 multiplexor circuits (a) has a unique n-bit (e.g. 8-bit) index input, one disable input, and a 2n-bit wide source input, (b) receives (i) an n-bit index at the n-bit index input, (ii) a disable bit at the disable input, and (iii) the 2n-bit input source word at the 2n-bit wide source input, and (c) decodes the n-bit index either (i) to select and output as an output destination bit one bit from the 2n-bit input source word if the disable bit has a logic low value or (ii) outputs a logic low as the output destination bit if the disable bit has…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.