Controller for scan distributor and controller architecture
US6378093B1 · kind B1 · utility
57Cited by
4References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 10, 1999 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Feb 10, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318555
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Functional circuits and cores of circuits are tested on integrated circuits using scan paths. Using parallel scan distributor and collector circuits for these scan paths improves test access of circuits and cores embedded within ICs and reduces the IC's power consumption during scan testing. A controller for the distributor and collector circuits includes a test control register, a test control state machine and a multiplexer. These test circuits can be connected in a hierarchy or in parallel. A conventional test access port or TAP can be modified to work with the disclosed test circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.