Method of manufacturing a semiconductor integrated circuit device
US6380037B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 2000 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Apr 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76281
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a line type or area type image sensor integrated circuit device with a high resolution is provided. In a semiconductor integrated circuit device using an SOI substrate, a signal processing circuit is formed in an SOI region while a photodiode is formed in a bulk region to have a trench structure in which a diffusion layer is formed on the side walls and the bottom of the trench, and the inside of the trench is coated with an insulting film, or an insulating film and polycrystalline silicon provided with an electric potential. With such a manufacturing method, a semiconductor integrated circuit device mounting a photodiode showing sufficient S/N ratio is provided despite of its small cell size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.