Method for forming composite gate dielectric layer equivalent to silicon oxide gate dielectric layer
US6380104B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 10, 2000 |
| Grant date | Apr 30, 2002 |
| Priority date | — |
| Expiry date | Aug 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming upon a semiconductor substrate employed within a microelectronics fabrication a composite gate insulating layer of MOS device comprising a silicon oxide dielectric layer and a high-K dielectric layer. The method employs thermal oxidation of a silicon semiconductor substrate to form an initial silicon oxide dielectric layer. A RPN plasma method is employed to form a layer of silicon nitride high-k dielectric material partly into the silicon oxide dielectric layer. The composite dielectric layer is dielectrically equivalent to the initial silicon oxide dielectric layer, with equivalent performance, reliability and manufacturability of the MOS device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.