Vertical bipolar transistor, in particular with an SiGe heterojunction base, and fabrication process
US6384469B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 23, 2000 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Oct 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/891
Abstract
The semiconductor region of an intrinsic collector is surrounded with a lateral insulating region. A semi-conducting layer comprising a SiGe heterojunction is partially located between the transmitter and the intrinsic collector and extends on either side of the transmitter above the lateral insulating region. The base intrinsic region is formed in said semi-conducting layer with heterojunction between the transmitter and the intrinsic collector. The base extrinsic region and the collector extrinsic region respectively comprise first zones formed in said semi-conducting layer with heterojunction, located respectively on either side of the transmitter and above the lateral insulating region first part and mutually electrically insulated by the lateral insulating region second part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.