Microprocessor debugging mechanism employing scan interface
US6385742B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1999 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Mar 5, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/261
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In order to smooth the entry into a debugging operation using a scan chain of registers in a microprocessor, a method for carrying out debugging procedures. The method comprises providing a processor with a chain of scan registers, a scan interface for interfacing with an external scan controller, a breakpoint interrupt mechanism for executing an interrupt instruction, and a processor clock control mechanism. The method includes detecting or generating a breakpoint in the operation of the processor. The breakpoint interrupt mechanism executes an interrupt instruction as a result of which the processor completes its current instruction, and signals the same to the scan interface. The scan interface asserts a Start Scan signal to the clock signal control mechanism, which whereupon stops the processor clock or clocks. The external scan controller is alerted to start a scan sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.