Method and structure for bonding layers in a semiconductor device
US6387736B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 1999 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Apr 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2007
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structure and a method for providing structural stability at an interface between two poorly adhering layers in a semiconductor device involve providing anchoring channels in one of the poorly adhering layers through which the other poorly adhering layer can be anchored to a third layer. Specifically, the structure and method are applicable to a three-layer stack having a top layer of amorphous silicon, a middle layer of titanium nitride, and a bottom layer of oxide. In order to reduce susceptibility to delamination between the amorphous silicon layer and the titanium nitride layer, the anchoring channels are created in the titanium nitride layer to allow the amorphous silicon to attach to the oxide layer. Because the amorphous silicon layer and the oxide layer exhibit good adhesion between each other, delamination between the amorphous silicon layer and the titanium nitride layer is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.