Method for manufacturing an integrated circuit with low threshold voltage differences of the transistors therein

US6387766B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventor

• Dirk Schumann · Lübbenau/Spreewald - Lubnjow/Błota, DE

Key dates

• Filing date: Oct 29, 1999
• Grant date: May 14, 2002
• Expiry date: Oct 29, 2019

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/26586
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In an integrated circuit with low threshold voltage differences of the transistors and a manufacturing process for such an integrated circuit, MOS transistors of different lengths but having threshold voltages that are substantially the same are made by avoiding dopant peaks at the channel edges by an angled nitrogen implantation, so that implantation paths at those edges are occupied by nitrogen atoms.