Single crystal silicon on polycrystalline silicon integrated circuits
US6388290B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 1998 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Jun 10, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/763
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprising active and passive devices is formed in a thin slice of monocrystalline semiconductor bonded to a high resistivity polycrystalline silicon substrate. As compared with conventional integrated circuits supported on a monocrystalline substrate, circuits in monocrystalline films bonded to high resistivity polycrystalline substrates are less subject to parasitic capacitance, crosstalk and eddy currents. As compared with typical SOI wafers, the polycrystalline substrates have higher resistivity, and this resistivity is much less affected by contamination than it would be in monocrystalline substrates. Compared to silicon-on-sapphire or silicon on any other insulating material, the polycrystalline substrates are more compatible with the mechanical, thermal, and optical properties of the crystalline silicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.