Differential clock crossing point level-shifting device
US6388943B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2001 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Jan 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various circuits for shifting the crossing point level of a pair of differential clocks signals are disclosed. In some embodiments, a differential clock driver provides a pair of differential clock signals to a device having a specified valid range for the crossing point of the differential clock signals. A level-shifting device is coupled to one or both of the differential clock signals to shift the crossing point to lie within the valid range. The device may be a memory device in some embodiments, and in certain embodiments the memory device may be DDR SDRAM. A method for configuring a computer system is also disclosed. An actual differential clock crossing point is compared to a specified range for the crossing point. If the actual crossing point is not within the specified range, a level-shifting device is coupled to one or both of the differential clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.