Microprocessor having addressable communication port
US6389498B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 1999 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Mar 12, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system that includes a microprocessor, and at least one other device on a single integrated circuit chip that can be connected to an external computer device. The integrated circuit chip includes: an on-chip CPU having a plurality of registers, a communication bus for providing a parallel communication path between the CPU and a first memory local to the CPU, and an external communication port connected to the communication bus. The port [having] has an internal connection to the communication bus with an internal parallel signal format and an external connection to the external computer device with an external format less parallel than the internal parallel signal format. The port forms part of the memory address space of the on-chip CPU from which instruction can be fetched, whereby: the port is addressable by execution of an instruction by the CPU, and the external computer device can send to the integrated circuit chip an interrupt signal simulating an interrupt signal from the at least one other device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.