Andrew Michael Jones
61Patents
12h-index
35Co-inventors
80Inventor score
Filing activity: Nov 27, 1995 → Dec 10, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6356960B1 | Microprocessor having an on-chip CPU fetching a debugging routine from a memory in an external debugging device in response to a control signal received through a debugging port | Physics | 99 | Expired |
| US6460105B1 | Method and system for transmitting interrupts from a peripheral device to another device in a computer system | Physics | 58 | Expired |
| USD561896S1 | Guidewire loader apparatus for a medical device | General | 54 | Expired |
| US6415344B1 | System and method for on-chip communication | Physics | 43 | Expired |
| USD566044S1 | Connector | General | 36 | Expired |
| US6526501B2 | Adapter for a microprocessor | Physics | 30 | Expired |
| US6598177B1 | Monitoring error conditions in an integrated circuit | Physics | 28 | Expired |
| US6301657A | System and method for booting a computer | Physics | 26 | Expired |
| US6457124B1 | Microcomputer having address diversion means for remapping an on-chip device to an external port | Physics | 18 | Expired |
| US6401191B1 | System and method for remotely executing code | Physics | 16 | Expired |
| US6389498B1 | Microprocessor having addressable communication port | Physics | 12 | Expired |
| US6301642A | Shared memory bus arbitration system to improve access speed when accessing the same address set | Physics | 12 | Expired |
| US8060732B2 | Multiple purpose integrated circuit | Physics | 12 | Active |
| US8468381B2 | Integrated circuit package with multiple dies and a synchronizer | Emerging Cross-Sectional Technologies | 11 | Active |
| US7260745B1 | Detection of information on an interconnect | Physics | 9 | Expired |
| US6763034B1 | Connection ports for interconnecting modules in an integrated circuit | Electricity | 9 | Expired |
| US6590907B1 | Integrated circuit with additional ports | Electricity | 8 | Expired |
| US6298394A | System and method for capturing information on an interconnect in an integrated circuit | Physics | 8 | Expired |
| US7000078B1 | System and method for maintaining cache coherency in a shared memory system | Physics | 8 | Expired |
| US6351790B1 | Cache coherency mechanism | Physics | 8 | Expired |
| US7228389B2 | System and method for maintaining cache coherency in a shared memory system | Physics | 8 | Expired |
| US6826191B1 | Packets containing transaction attributes | Physics | 8 | Expired |
| US7951092B2 | Guidewire loader apparatus and method | Human Necessities | 7 | Active |
| US6697931B1 | System and method for communicating information to and from a single chip computer system through an external communication port with translation circuitry | Physics | 7 | Expired |
| USD510739S1 | Computer interface | General | 6 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.